Computer Arithmetic and Verilog HDL Fundamentals
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- Synopsis
-
Verilog Hardware Description Language (HDL) is the state-of-the-art method for designing digital and computer systems. Ideally suited to describe both combinational and clocked sequential arithmetic circuits, Verilog facilitates a clear relationship between the language syntax and the physical hardware. It provides a very easy-to-learn and practical means to model a digital system at many levels of abstraction.
Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all primary operations. Silvaco International’s SILOS, the Verilog simulator used in these pages, is simple to understand, yet powerful enough for any application. It encourages users to quickly prototype and de-bug any logic function and enables single-stepping through the Verilog source code. It also presents drag-and-drop abilities.
Designed for electrical and computer engineers and computer scientists, this book leaves nothing unfinished, carrying design examples through to completion. The goal is practical proficiency. To this end, each chapter includes problems of varying complexity to be designed by the reader.
- Copyright:
- 2010
Book Details
- Book Quality:
- Publisher Quality
- Book Size:
- 971 Pages
- ISBN-13:
- 9781351834117
- Related ISBNs:
- 9781439811245, 9781315218229
- Publisher:
- CRC Press
- Date of Addition:
- 10/09/18
- Copyrighted By:
- Taylor and Francis Group, LLC
- Adult content:
- No
- Language:
- English
- Has Image Descriptions:
- No
- Categories:
- Nonfiction, Computers and Internet, Technology
- Submitted By:
- Bookshare Staff
- Usage Restrictions:
- This is a copyrighted book.